Computer Architecture (and Low-Level Programming)

Online Information Index and Lecture Session Breakdown

(* UNDER CONSTRUCTION *)


Sketch of Lecture Sessions

  1. Class introduction (week 1)
    1. Goals and expectations of this course
    2. Review of basic architecture: block diagram of a generic computer and basic program execution
    3. Architecture design goals
  2. Low-level programming issues (weeks 2-3)
    1. High-level language support
      • Parameters, local variables
      • High-level language calling convensions
      • Architecture support for high-level languages
    2. Co-routines and "processes"
      • Using several stacks
      • State of computation ("process")
      • Re-entrant code
      • Transfer of control: RESUME operation
    3. Pseudo-operations and the process of assembly and linking
      • Macros (outline)
      • Assembly: pass I
      • Assembly: pass II
      • Address fixup tables, relocatable object files
      • The linking process and executable files
      • Libraries, dynamic linking
    4. Monitors and debuggers: debugging low-level programs
      • Viewing and modifying registers and data
      • Running, single-stepping, breakpoints
      • Trace and watch
      • Symbolic debuggers
  3. A RISC Architecture and Assembly Language - MIPS (weeks 4-8)
    1. RISC vs. CISC
      • Computer performance measures
      • CISC design basics
      • RISC design basics
    2. MIPS organization and architecture
      • Register set
      • Instruction formats
      • Addressing modes
    3. MIPS assembly language
      • Branch instructions
      • Arithmetical and logical instructions
      • Load/store instructions
    4. The arithmetical and logical unit (ALU)
      • Arithmetic operations on integers
      • Logical operations
      • Status bit generation
      • MIPS ALU
    5. The control unit and the datapath
      • The Branch execution unit
      • Hard wired control
      • Single cycle control
      • The MIPS Data-path
    6. Processor bus interface
    7. Microprogramming
      • The control logic unit
      • Multiple cycle hard-wired control
      • Microprogram control
  4. Issues in modern architectures (weeks 9-12)
    1. Advanced data formats: floating point standards
    2. Associative memory and caches
    3. Address mapping (paging, segmentation, virtual memory)
    4. Pipelining
    5. Co-processor and multiprocessor systems
  5. System Issues (weeks 12-13)
    1. Machine control operations and interrupts
      • Protection support instructions
      • Interrupts: hardware and software
      • Atomic operations
      • Special control operations
    2. Inter-process/processor communication
      1. Error detection and correction
        • Parity and error detection
        • Principles of error correction
        • Single-bit error correction: Hamming code
        • Hamming + parity and beyond
        • Correcting erasures
      2. Parallel communication (hardware handshake)
      3. Serial communication
        • USART device, serial communication
        • Hardware level: RS232, RS422
        • Hardware and software (XON-XOFF) handshakes

Online Exercises

Web pages for exercise sessions and assignments can be accessed here.

Other Online Material

  1. Slides for week 1 lectures, (sans figures - postscript).
  2. Slides for week 2-3 lectures, (postscript).
  3. Slides for week 4-5 lectures, (postscript).
  4. Slides from Patterson and Hennesy. Copyright 1998 Morgan Kaufmann Publishers.
    1. Chapters 1-4, powerpoint, or postscript.
    2. Chapter 5, powerpoint, or postscript.
    3. Chapter 6, powerpoint, or postscript.
    4. Chapters 7-9, powerpoint, or postscript.

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